Today, Google and Qualcomm announced an extension of their partnership to bring RISC-V-based systems-on-chips (SoCs) to market with support for Wear OS, a version of Android for smartwatches and ...

Samsung is preparing a PCIe 5.0 SSD that pairs quad-level cell (QLC) flash memory with a RISC-V-based controller, a ...

A compact microcontroller board blends Arm and RISC-V cores with USB convenience, targeting flexible embedded development.

The launch comes as AI agents are becoming the latest battlefield for Chinese tech companies after OpenClaw took the industry ...

I was discussing with a colleague about the concept of architecture license in RISC-V. I realized that, in the open-source world, it can be a little tricky to grasp. In a traditional processor IP ...

Nothing ever made is truly perfect and indeed, CPU architectures like x86, RISC-V, ARM, and PowerPC all have their own ...

The partnership focuses on integrating eSOL’s “real-time” operating system technology with Quintauris’ RISC-V platforms.

Alibaba has introduced the XuanTie C950, a high-performance 64-bit RISC-V processor core designed for demanding workloads ...

SiFive Inc., a computer chip startup that’s developing processor technology based on the open-source RISC-V instruction set architecture, said today it has raised a hefty $175 million in a late-stage ...

Linea, the Ethereum Layer 2 network developed by ConsenSys, is transitioning from direct EVM arithmetization to a RISC-V-based proving architecture. The team spent three years building one of the most ...

RISC-V is an open-source instruction set definition managed by RISC-V International. This TechXchange includes content that delves into the architecture and design of a RISC-V processor core. How did ...

The BM9K1 reportedly delivers sequential read speeds of up to 11.4 GB/s, which Samsung said is 1.6 times faster than its predecessor, the PCIe 4.0 BM9C1.